Product Description
1 Features
1.1 Hot pluggable QSFP28 MSA form factor
1.2 Compliant to IEEE802.3ba 100GBASE-LR4
1.3 Supports103.1Gb/s aggregate bit rate
1.4 Up to10km reach for G.652 SMF
1.5 Single +3.3V power supply
1.6 Operating case temperature:0~70°C
1.7 Transmitter: cooled 4x25Gb/s LANWDM DFB TOSA(1295.56,1300.05,1304.58,1309.14nm)
1.8 Maximum power consumption 4.0W
1.9 Duplex LC receptacle
1.10 RoHS-6 compliant
2 Applications
2.1 100GBASE-LR4 Ethernet Links
2.2 Infiniband QDR and DDR interconnects
2.3 Data center and Enterprise networking
2.4 Optical Characteristics
Parameter | Symbol | Min. | Typ. | Max. | Unit | Note |
Wavelength Assignment | L0 | 1294.53 | 1295.56 | 1296.59 | nm |
|
L1 | 1299.02 | 1300.05 | 1301.09 | nm |
|
L2 | 1303.54 | 1304.58 | 1305.63 | nm |
|
L3 | 1308.09 | 1309.14 | 1310.19 | nm |
|
Transmitter |
Side Mode Suppression Ratio | SMSR | 30 |
|
| dB |
|
Total Average Launch Power | PT |
|
| 10.5 | dBm |
|
Average Launch Power, Each Lane | PAVG | -4.3 |
| 4.5 | dBm |
|
Extinction Ratio | ER | 4 |
|
| dB |
|
Average Launch Power OFF Transmitter, each Lane | Poff |
|
| -30 | dBm |
|
Receiver |
Damage Threshold, each Lane | THd | 5.5 |
|
| dBm |
|
Average Receive Power, Each Lane |
| -10.6 |
| 4.5 | dBm |
|
Receiver Sensitivity,each Lane | SEN |
|
| -10.6 | dBm | 5.3.1 |
Receiver Reflectance | RR |
|
| -26 | dBm |
|
LOSAssert | LOSA | -30 |
|
| dBm |
|
LOSDeassert | LOSD |
|
| -13 | dBm |
|
LOS Hysteresis | LOSH | 0.5 |
|
| dB |
|
Note5.3.1:Measuredwith25.78GbpsPRBS231-1BER=5x10-5.
3 Pin Definitions
3.1 Pin Diagram
3.2 Pin Descriptions
Pin# | Logic | Name | Function | Notes |
1 |
| GND | Ground | 1 |
2 | CML-I | Tx2n | Transmitter Inverted Data Input |
|
3 | CML-I | Tx2p | Transmitter Non-Inverted Data output |
|
4 |
| GND | Ground | 1 |
5 | CML-I | Tx4n | Transmitter Inverted Data Input |
|
6 | CML-I | Tx4p | Transmitter Non-Inverted Data output |
|
7 |
| GND | Ground | 1 |
8 | LVTLL-I | ModSelL | Module Select |
|
9 | LVTLL-I | ResetL | Module Reset |
|
10 |
| VccRx | +3.3V Power Supply Receiver | 2 |
11 | LVCMOS-I/O | SCL | 2-Wire Serial Interface Clock |
|
12 | LVCMOS-I/O | SDA | 2-Wire Serial Interface Data |
|
13 |
| GND | Ground |
|
14 | CML-O | Rx3p | Receiver Non-Inverted Data Output |
|
15 | CML-O | Rx3n | Receiver Inverted Data Output |
|
16 |
| GND | Ground | 1 |
17 | CML-O | Rx1p | Receiver Non-Inverted Data Output |
|
18 | CML-O | Rx1n | Receiver Inverted Data Output |
|
19 |
| GND | Ground | 1 |
20 |
| GND | Ground | 1 |
21 | CML-O | Rx2n | Receiver Inverted Data Output |
|
22 | CML-O | Rx2p | Receiver Non-Inverted Data Output |
|
23 |
| GND | Ground | 1 |
24 | CML-O | Rx4n | Receiver Inverted Data Output | 1 |
25 | CML-O | Rx4p | Receiver Non-Inverted Data Output |
|
26 |
| GND | Ground | 1 |
27 | LVTTL-O | ModPrsL | Module Present |
|
28 | LVTTL-O | IntL | Interrupt |
|
29 |
| VccTx | +3.3V Power Supply transmitter | 2 |
30 |
| Vcc1 | +3.3V Power Supply | 2 |
31 | LVTTL-I | LPMode | Low Power Mode |
|
32 |
| GND | Ground | 1 |
33 | CML-I | Tx3p | Transmitter Non-Inverted Data Input |
|
34 | CML-I | Tx3n | Transmitter Inverted Data Output |
|
35 |
| GND | Ground | 1 |
36 | CML-I | Tx1p | Transmitter Non-Inverted Data Input |
|
37 | CML-I | Tx1n | Transmitter Inverted Data Output |
|
38 |
| GND | Ground | 1 |
Notes: Module circuit ground is isolated from module chassis ground within the module.GND is the symbol for signal and supply(power) common for QSFP28 modules.
4 Ordering information
Part Number | Product Description |
HD-QSFP28/100G-LR4 | QSFP28 LR4 10km optical module with full real-time digital diagnostic monitoring And pulltab. |
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